Laplacian edge detection algorithm for road signal images and FPGA implementation

Abstract

The applications of image processing for road safety, detecting panels and roadway have attracted considerable attention in literature and research, especially in the field of information processing on embedded systems. However, the demanding nature of image processing algorithms conveys a substantial burden for any conventional real-time implementation. Meanwhile, the emergence of reconfigurable architectures, especially FPGA chips, which have been given many facilities for rapid prototyping, where an image processing algorithm, can be designed, tested, and synthesized in a relatively short period of time compared to conventional or traditional approaches. This paper studies a hardware and software combination to obtain an optimal solution for the edge detection, this step is considered essential for the detection of panels and roadways, the dedicated algorithm is based on the Laplacian calculation for Edges detecting and implemented in a Xilinx Spartan 6 FPGA, and the results are displayed by standing in a VGA monitor, with a sync and display controller.