Optimizing U-Shape FinFETs for Sub-5nm Technology: Performance Analysis and Device-to-Circuit Evaluation in Digital and Analog/Radio Frequency Applications

Abstract

FinFET is considered as the potential contender in the era of Multigate FETs. This manuscript for the first time presents the structural variations for Junctionless FinFET devices at IRDS sub-5nm technology node. Four JL-FinFET novel structures are proposed here namely Junctionless Middlegate-U shape FinFET (JL-MG-U-FinFET), Junctionless U shaped FinFET (JL-U-FinFET), Junctionless Inverted-U shaped FinFET (JL-Inv-U-FinFET), and Junctionless Double gate- Inverted-U shaped FinFET (JL-DG-Inv-U-FinFET). The electrical and analog/RF performances of these structures are compared and it is found that JL-DG-Inv-U-FinFET gives better performance in terms of minimizing short channel effects as well as in terms of analog/RF characteristics. The I ON /I OFF ratio values for (JL-MG-U-FinFET, JL-U-FinFET, JL-Inv-U-FinFET, and JL-DG-Inv-U-FinFET) are observed as 8.5 × 10 6 , 1.2 × 10 9 , 2.04 × 10 8 , and 1.1 × 10 10 , respectively. Similarly, the SS values are noted as 93.44 mV dec −1 , 70.87 mV dec −1 , 70.61 mV dec −1 , and 62.1 mV dec −1 for the respective configurations. Furthermore, the effect of variation in geometrical parameters such as gate length (L g ), U-shaped fin width (W U-fin ), and U-shaped fin height (H U-fin ) on DC and analog/RF characteristics is also explored. It has been observed that the DC parameters such as I on /I off ratio, SS are better for higher L g , lower W U-fin , and higher H U-fin . Moreover, the JL-DG-Inv-U-FinFET based Common Source (CS) amplifier produced a gain of 5.2. The results reported in this study will aid device engineers in selecting better geometrical parameters to achieve improved JL-DG-Inv-U-FinFET performance.