Small size, low power, side channel-immune AES coprocessor: Design and synthesis results

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Abstract

When cryptosystems are being used in real life, hardware and software implementations themselves present a fruitful field for attacks. Side channel attacks exploit information such as time measurements, power consumption, and electromagnetic emission that leaks from a device when it executes cryptographic applications. When leaked information is correlated to a secret key, an adversary may be able to recover the key by monitoring this information. This paper describes an AES coprocessor that provides complete protection against first-order differential power analysis by embedding a widely used software countermeasure that decorrelates data being processed from the leaked information, so-called data masking, at a hardware level. © Springer-Verlag Berlin Heidelberg 2005.

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Trichina, E., Korkishko, T., & Lee, K. H. (2005). Small size, low power, side channel-immune AES coprocessor: Design and synthesis results. In Lecture Notes in Computer Science (Vol. 3373, pp. 113–127). Springer Verlag. https://doi.org/10.1007/11506447_10

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