Multilevel Inverters (MLIs) are becoming more and more popular in medium and high power applications. This is due to several inherent advantages of MLI over two-level inverters such as high-quality output, lower device ratings, and several others. While the classical topologies are still having applications in most of the key areas, there is a growing interest in newer multilevel topologies with an objective of reducing power semiconductor device count, gate drivers and/or isolated DC sources. In this paper, a comprehensive review of some of the recently proposed newer multilevel inverter topologies with the abovementioned objectives is presented. In this article, a detailed investigation in terms of total power semiconductor switch count, number of DC sources, passive component requirement, highest switch voltage rating, total standing voltage etc. has been presented.
CITATION STYLE
Omer, P., Kumar, J., & Surjan, B. S. (2020). A Review on Reduced Switch Count Multilevel Inverter Topologies. IEEE Access, 8, 22281–22302. https://doi.org/10.1109/ACCESS.2020.2969551
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