Architecture Design of a Single-chip Multiprocessor

Abstract

Single-chip multiprocessor(CMP) architecture provides an important research direction for the future microprocessors. A CMP architecture(TCMP) is put forward on the basis of the prior researches on RISC microprocessor. T-CMP integrating two MIPS-based processors is a closely coupled multiprocessor, engaging aggressive thread-level and process-level parallel techniques to improve the performance. This paper presents the key techniques of its implementation, including hardware construction and software design. A functional verification simulator is also developed to simulate the behavior of program executions in the mode of cycle-by-cycle. The results show that the design can improve the computing performance effectively.