This chapter aims to present different approaches and techniques available in literature regarding the fault mitigation on soft-core processors, with an especial emphasis on those ones involving hardware/software hybrid-based solutions.
CITATION STYLE
Martínez-Álvarez, A., Cuenca-Asensi, S., & Restrepo-Calle, F. (2015). Soft error mitigation in soft-core processors. In FPGAs and Parallel Architectures for Aerospace Applications: Soft Errors and Fault-Tolerant Design (pp. 239–258). Springer International Publishing. https://doi.org/10.1007/978-3-319-14352-1_16
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