Junctionless Gaussian Doped Negative Capacitance SOI Transistor: Investigation of Device Performance for Analog and Digital Applications

Abstract

In this work the performance of Junctionless Gaussian Doped Negative Capacitance Silicon-on-Insulator (JLGDNCSOI) transistor has been explored to examine the suitability of device for various analog and digital applications. The Negative Capacitance phenomenon of ferroelectric layer along with vertical Gaussian doped channel significantly enhances the performance of JL devices. To explore the electrical characteristics of JLGDNCSOI transistor TCAD models along with Landau-Khalatnikov equation which takes into account properties of Hafnium oxide based ferroelectric layer such as coercive field and remanent polarization have been used. It has been demonstrated that device exhibits substantially improved transfer characteristics, output characteristics, transconductance generation factor, output conductance and unity gain frequency.