Abstract
This paper proposes a scheme of a crossbar based on-chip adaptive interconnection, named CRAIS. CRAIS utilizes crossbar to connect processors and IP cores in MPSoC. The interconnect topology of CRAIS can be dynamically reconfigured during execution. Empirical results on FPGA prototype demonstrated that CRAIS runs correctly with affordable hardware cost. © 2012 Springer-Verlag.
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CITATION STYLE
Wang, C., Li, X., Zhou, X., & Feng, X. (2012). CRAIS: A crossbar based adaptive interconnection scheme. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 7199 LNCS, pp. 379–384). https://doi.org/10.1007/978-3-642-28365-9_35
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