In order to improve the performance of the superjunction (SJ) Insulated Gate Bipolar Transistor (IGBT), the plugged p+ collector is implemented. By replacing the p+ collector with an optimized combination of p- and p+ collectors, it offers better blocking voltage and switching speed simultaneously. Simulation results show that the blocking voltage increases from 204 to 329 V by 61.27 % and the switching-off time reduces from 0.335 to 0.170 μs by 49.3 %. The proposed structure shows lower loss, higher breakdown voltage, and higher switching speed compared with conventional SJ IGBT. The optimized switching-off loss (E off) and V cesat trade-off makes the proposed structure suitable for high-speed and high-power applications. © 2014 Springer Science+Business Media New York.
CITATION STYLE
Wu, J., Jiang, F., Li, Z., Lin, X., & He, J. (2014). A planar SJ IGBT with plugged p+ collector. In Lecture Notes in Electrical Engineering (Vol. 238 LNEE, pp. 693–700). Springer Verlag. https://doi.org/10.1007/978-1-4614-4981-2_75
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