Hardware trust verification

Abstract

Hardware Trojans (HTs) inserted at design time by malicious insiders on the design team or third-party intellectual property providers posed a great threat on the security of computing systems. This chapter did a thorough analysis on the characterization of Trojans at design time and categorized them into bug-based HTs and parasite-based HTs. Nearly all HTs in literature are parasite-based because of its stealthiness, which means they are not activated during the functional verification stage. Based on this assumption, three methods, UCI, VeriTrust and FANCI, are introduced in this chapter to detect potential Trojans by different observations in the HT’s characteristics. These methods are proved to be effective to most HTs proposed in literature. However HT design and defence is an endless battle that attackers would always respond with more tricky HT design facing updated security verifications. In the last part of this chapter, stealthy HT designs which evade above 3 trust verification techniques would also be presented.