Abstract
In this paper an architecture based on FPGA's for real time image processing is described. The system is composed of a high resolution (1280×1024) CMOS sensor connected to a FPGA that will be in charge of acquiring images from the sensor and controlling it too. A PC sends certain orders and parameters, configured by the user, to the FPGA. The connexion between the PC and the FPGA is made through the parallel port. On the other hand, the resolution of the captured image, as well as the selection of a window of interest inside the image, are configured by the user in the PC. Finally, a system to make the convolution between the captured image and a nxn-mask is shown. © Springer-Verlag Berlin Heidelberg 2006.
Cite
CITATION STYLE
Bravo, I., Jiménez, P., Mazo, M., Lázaro, J. L., & Martín, E. (2006). Architecture based on FPGA’s for real-time image processing. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 3985 LNCS, pp. 152–157). Springer Verlag. https://doi.org/10.1007/11802839_21
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