Speculation for parallelizing runtime checks

6Citations
Citations of this article
12Readers
Mendeley users who have this article in their library.
Get full text

Abstract

We present and evaluate a framework, ParExC, to reduce the runtime penalties of compiler generated runtime checks. An obvious approach is to use idle cores of modern multi-core CPUs to parallelize the runtime checks. This could be accomplished by (a) parallelizing the application and in this way, implicitly parallelizing the checks, or (b) by parallelizing the checks only. Parallelizing an application is rarely easy and frameworks that simplify the parallelization, e.g., like software transactional memory (STM), can introduce considerable overhead. ParExC is based on alternative (b). We compare it with an approach using a transactional memory-based alternative. Our experience shows that ParExC is not only more efficient than the STM-based solution but the manual effort for an application developer to integrate ParExC is lower. ParExC has - in contrast to similar frameworks - two noteworthy features that permit a more efficient parallelization of checks: (1) speculative variables, and (2) the ability to add checks by static instrumentation. © 2009 Springer-Verlag Berlin Heidelberg.

Cite

CITATION STYLE

APA

Süßkraut, M., Weigert, S., Schiffel, U., Knauth, T., Nowack, M., De Brum, D. B., & Fetzer, C. (2009). Speculation for parallelizing runtime checks. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 5873 LNCS, pp. 698–710). https://doi.org/10.1007/978-3-642-05118-0_48

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free