Gate Field Plate Structure for Subthreshold Swing Improvement of Si Line-Tunneling FETs

Abstract

Tunnel field-effect transistors (TFETs) are promising for use in ultralow-power applications owing to their distinct band-to-band tunneling operation. However, the ON-state current of these Si-based tunnel devices is considerably lower than that of MOSFETs. Furthermore, a high-κ dielectric is used as a gate insulator or spacer to increase the TFET's tunneling field strength; this usually causes fringe-induced barrier lowering and deterioration of its subthreshold characteristics. Here, in this paper, a gate field plate TFET (GFP-TFET) structure is proposed to enhance the driving current and suppress the current kink induced by fringe-induced barrier lowering. A detailed investigation into the effects of a gate field plate on TFET performance was conducted with the help of extensive device simulations. The gate oxide and gate field plate oxide could be used to tailor the electric field lines to increase the electric field in the tunnel junction. Meanwhile, the fringing field concentration was reduced by using a metal with a relatively high work function as the field plate electrode. Thus, the electric field strength decreased near the gate edge and increased in the channel. The GFP-TFET exhibited high driving current and low subthreshold characteristics at the cost of a reduction in cutoff frequency. A GFP-TFET structure with optimized parameters had a 103× higher ON-state current compared with a normal silicon tunnel FET. The minimum subthreshold swing decreased from 146.3 to 21.4 mV/dec and the ON/OFF current ratio increased from 107 to 1013 compared with a normal TFET.