State encoding for low-power FSMs in FPGA

Abstract

In this paper, we address the problem of state encoding of FPGA-based Finite State Machines (FSMs) for low power dissipation. Recent work on this topic [1] shows that binary encoding produces best results for small FSMs (up to 8 states) while one-hot encoding produces best results for large FSMs (over 16 states). Departing from these results, we analyze other encoding alternatives that specifically take into account state transition probabilities. More precisely, we consider minimal-bit minimal Hamming distance encoding, zero-one-hot encoding and a partitioned encoding that uses a combination of both minimal-bit encoding and zero-one-hot encoding. Experimental results demonstrate that the proposed encoding techniques usually produce better results than the binary or one-hot encodings. Savings up to 60% can be obtained in the dynamic power dissipation by using the proposed encoding techniques. © Springer-Verlag Berlin Heidelberg 2003.