Abstract
New insights into the general structure of partial product reduction trees are combined with the notion of clever circuits to give a novel method of writing simple but flexible and highly parameterised data-path generators. © Springer-Verlag 2004.
Cite
CITATION STYLE
APA
Sheeran, M. (2004). Generating fast multipliers using clever circuits. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 3312, 6–20. https://doi.org/10.1007/978-3-540-30494-4_2
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