Low-power pipelined A/D conversion

Abstract

This paper reviews recent developments and low-power design techniques for high-speed pipelined A/D converters. The discussion spans a review of the fundamental operation principles, a summary of widely used low-power techniques, and an examination of ideas that have been proposed in recent research publications. As we will show, the best research-level designs reach a power efficiency that lies within an order of magnitude of practically achievable limits in today's architectures. This corresponds to a 2-3 order of magnitude improvement relative to the first pipelined ADCs designed in the late 1980s and early 1990s. © 2012 Springer Science+Business Media B.V.