Hamming network circuits based on CMOS/memristor hybrid design

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Abstract

Memristor, as an innovative technology, has been pro-posed in the application of neural networks since its physical imple-mentation was reported by HP lab. In this paper, we proposed a Ham-ming network circuits based on CMOS/memristor hybrid design which is compact in device size and circuit structure. Through HSPICE sim-ulation, pattern recognition and classification functions of hamming network circuits are demonstrated using a 16 × 16 nanocrossbar memory. © IEICE 2013.

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APA

Zhu, X., Yang, X., Wu, C., Wu, J., & Yi, X. (2013). Hamming network circuits based on CMOS/memristor hybrid design. IEICE Electronics Express, 10(12). https://doi.org/10.1587/elex.10.20130404

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