A comparative study of single electron threshold logic-based and SET-MOS hybrid based half subtractor

Abstract

In the present work, we have implemented a half subtractor using two different approaches, single electron threshold logic-based approach and SET-MOS hybrid approach. The logic operation of the designed circuits is tested using TSPICE and Monte–Carlo-based simulation tool SIMON. The stability of the threshold logic-based circuit is tested using the stability plots. Further we compared the performances to characterize the advantages and disadvantages of both the approaches. The proper functioning of both the circuits is successfully verified by observing the simulated output waveforms.