Implementación hardware de la función Hash SHA3-256 usando una arquitectura Pipeline

Abstract

Hash functions are a fundamental part of computer security applications such as authentication systems and digital signatures. Many of these applications require a high processing rate; therefore, it is important to explore alternatives that contribute to reduce the computation time of these functions. This paper presents a two-stage pipelined architecture for SHA3-256 hash function that supports single and multi-message processing. Each pipeline stage executes two rounds of the algorithm in one clock cycle. The proposed pipelined architecture has been implemented in Xilinx Virtex-5 and achieves a throughput 27,98 Gbps. This implementation allowed to obtain an improvement in the overall performance of the two-stage pipelined KECCAK function regarding implementations of iterative round and even other implementations multi-stage pipelined. (English) [ABSTRACT FROM AUTHOR]