The action systems formalism has recently been applied to the area of asynchronous and synchronous VLSI design. In this paper, we study formal aspects of synchronous pipelining. We show how the framework of synchronous action systems can be used to derive a pipelined structure from a non-pipelined specification in a correctness-preserving manner.
CITATION STYLE
Seceleanu, T., & Plosila, J. (2001). Formal pipeline design. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 2144, pp. 167–172). Springer Verlag. https://doi.org/10.1007/3-540-44798-9_15
Mendeley helps you to discover research relevant for your work.