An FPGA-Based Classical Implementation of Branch and Remove Algorithm

Abstract

Many solutions came into limelight to explore the mobile robot navigation methods in a known environment with some constraints. Each and every such solution has its own merits and demerits in their simulation as well as implementation. By considering the issues in traveling salesman problem (TSP) which can be adopted in every differential field, we have been through classic implementation of branch and remove algorithm that considers every connected component in the known environment for implementation. With this paper, we came up with simulated results of branch and remove algorithm that exhibits minimum path journey by considering all edges connected among all the nodes in a complete graph. For the simulation in the Verilog HDL environment, the edge length is considered as distance metric or cost of travel between nodes as well as selection of initial node is considered to start the solution of minimum path finding. The results in this paper show that the initial point selection could be random and the implementation works well for any number of nodes and any edge length connecting them.