Design and performance comparison of modular multipliers implemented on FPGA platform

Abstract

Modular multiplier is the most critical component in many data security protocols based on public key cryptography (PKC). To provide data security in many real time applications, a high performance modular multiplier is of utmost importance. Two techniques mostly used for high speed modular multiplication are Montgomery Modular Multiplication (MMM) and Interleaved Modular Multiplication (IMM). This paper presents radix-2 hardware implementation of the MMM and IMM methods with detailed performance analysis. The designs are implemented in Verilog HDL and synthesized targeting Xilinx Virtex-6 FPGA platform. Synthesized results indicate that the radix-2 MMM design is better in terms of computation time, FPGA slice area and throughput as compared to the radix-2 IMM design.