Abstract
Energy consumption is becoming one of the key optimization objects in on-chip multiprocessor. Minimizing the energy consumption without parallel performance loss is concerned. In this paper, we focus on a DVFS-enabled onchip multiprocessor architecture, which allows dynamically adjusting each processor's voltage/frequency or shut down unused processors so to obtain energy savings. A detailed analytical model is provided and validated by experiments. Experimental results show energy saving can be up to 10.34% without performance loss. © Springer-Verlag Berlin Heidelberg 2006.
Cite
CITATION STYLE
Chen, J., Yi, H., Yang, X., & Qian, L. (2006). Compile-time energy optimization for parallel applications in on-chip multiprocessors. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 3992 LNCS-II, pp. 904–911). Springer Verlag. https://doi.org/10.1007/11758525_120
Register to see more suggestions
Mendeley helps you to discover research relevant for your work.
