Power-aware instruction scheduling

0Citations
Citations of this article
3Readers
Mendeley users who have this article in their library.
Get full text

Abstract

This paper presents an innovative DVS technique to reduce the energy dissipation. Our objective is to minimize the transitions between power modes by maximizing the idle periods of functional units with instruction scheduling. Our work first analyzes the control flow graph of the application, which contains many regions. Second, we collect the power information and build its power model for each region. Then two regions with the same functional units will be merged if no dependencies exist between them. The process is repeated until no further mergings can be performed. Next, the idle functional units will be turned off and each region will be assigned a power mode based on the power model. Finally, the application is rescheduled to merge the regions to reduce the transitions between power modes. The experimental results show that our work can save the energy by 26%. © IFIP International Federation for Information Processing 2006.

Cite

CITATION STYLE

APA

Lin, T. Y., & Chang, R. G. (2006). Power-aware instruction scheduling. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4096 LNCS, pp. 35–44). Springer Verlag. https://doi.org/10.1007/11802167_6

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free