Integration of system-level IP cores in object-oriented design methodologies

Abstract

IP core reuse is popular for designing and implementing complex systems, because reuse of already provided blocks decreases design time and so diminishes productivity gap. Moreover, as system-level design methodologies and tools emerge for embedded system design, it is useful to have a shift from Register Transfer Level to system-level models for IP cores employed for implementation of hardware parts of the system. In this paper, we propose a C++ model for hardware IP cores that can be adopted as a standard for delivering IPs at a high level of abstraction, suitable for object-oriented system-level design methodologies. Next, we extend our system-level synthesizer in order to integrate IP cores automatically in a system architecture model generated by the synthesizer. Finally, we validate the extended synthesizer by designing and implementing systems with proposed C++ IP cores in our extended system-level design environment. © 2008 Springer-Verlag.