An architecture design for evolvable computer

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Abstract

In recent years, there has been a remarkable growth of the portable computing devices market. To develop and design a scalable, programmable architecture that can be dynamically reconfigured during program execution to a new circuit structure is a key design goal for self-reconfigurable computing systems. In this paper we proposes a new architecture of evolvable computer, this architecture consists of a general-purpose processor, a reconfigurable component (programmable array) and a evolutionary algorithms processor (DSP), and describe the work mechanism of the evolvable computer in detail. © 2008 Springer Berlin Heidelberg.

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APA

Yan, X., Shi, C., Kang, L., & Huang, S. (2008). An architecture design for evolvable computer. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 5370 LNCS, pp. 206–211). https://doi.org/10.1007/978-3-540-92137-0_23

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