Abstract
Content Addressable Memories or CAMs are popular parallel matching circuits. They provide the capability, in hardware, to search a table of data for a matching entry. This functionality is a high performance alternative to popular software-based searching schemes. CAMs are typically found in embedded circuitry where fast matching is essential. This paper presents a novel approach to CAM implementation using FPGAs and run-time reconfiguration. This approach produces CAM circuits that are smaller, faster and more flexible than traditional approaches. © 2000 Springer-Verlag Berlin Heidelberg.
Cite
CITATION STYLE
Guccione, S. A., Levi, D., & Downs, D. (2000). A reconfigurable Content Addressable Memory. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 1800 LNCS, pp. 882–889). Springer Verlag. https://doi.org/10.1007/3-540-45591-4_122
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