An evaluation of hash functions on a power analysis resistant processor architecture

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Abstract

Cryptographic hash functions are an omnipresent component in security-critical software and devices; they support digital signature and data authenticity schemes, mechanisms for key derivation, pseudo-random number generation and so on. A criterion for candidate hash functions in the SHA-3 contest is resistance against side-channel analysis which is a major concern especially for mobile devices. This paper explores the implementation of said candidates on a variant of the Power-Trust platform; our results highlight a flexible solution to power analysis attacks, implying only a modest performance overhead. © 2011 IFIP International Federation for Information Processing.

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APA

Hoerder, S., Wójcik, M., Tillich, S., & Page, D. (2011). An evaluation of hash functions on a power analysis resistant processor architecture. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 6633 LNCS, pp. 160–174). https://doi.org/10.1007/978-3-642-21040-2_11

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