Facilitation of the four-mask process by the double-layered Ti/Si barrier metal for oxide semiconductor TFTs

11Citations
Citations of this article
7Readers
Mendeley users who have this article in their library.

This article is free to access.

Abstract

The double-layered Ti/Si barrier metal is demonstrated for the source/drain Cu interconnections in oxide semiconductor thin-film transistors (TFTs). The transmission electromicroscopy and ion mass spectroscopy analyses revealed that the double-layered barrier structure suppresses the interfacial reaction and the interdiffusion at the interface after thermal annealing at 350°C. The underlying Si layer was found to be very useful for the etch stopper during wet etching for the Cu/Ti layers. The oxide TFTs with a double-layered Ti/Si barrier metal possess excellent TFT characteristics. It is concluded that the present barrier structure facilitates the back-channel-etch-type TFT process in the mass production line, where the four- or five-mask process is used. © 2012 Copyright The Korean Information Display Society.

Cite

CITATION STYLE

APA

Hino, A., Maeda, T., Morita, S., & Kugimiya, T. (2012). Facilitation of the four-mask process by the double-layered Ti/Si barrier metal for oxide semiconductor TFTs. Journal of Information Display, 13(2), 61–66. https://doi.org/10.1080/15980316.2012.673509

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free