Facilitation of the four-mask process by the double-layered Ti/Si barrier metal for oxide semiconductor TFTs

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Abstract

The double-layered Ti/Si barrier metal is demonstrated for the source/drain Cu interconnections in oxide semiconductor thin-film transistors (TFTs). The transmission electromicroscopy and ion mass spectroscopy analyses revealed that the double-layered barrier structure suppresses the interfacial reaction and the interdiffusion at the interface after thermal annealing at 350°C. The underlying Si layer was found to be very useful for the etch stopper during wet etching for the Cu/Ti layers. The oxide TFTs with a double-layered Ti/Si barrier metal possess excellent TFT characteristics. It is concluded that the present barrier structure facilitates the back-channel-etch-type TFT process in the mass production line, where the four- or five-mask process is used. © 2012 Copyright The Korean Information Display Society.

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CITATION STYLE

APA

Hino, A., Maeda, T., Morita, S., & Kugimiya, T. (2012). Facilitation of the four-mask process by the double-layered Ti/Si barrier metal for oxide semiconductor TFTs. Journal of Information Display, 13(2), 61–66. https://doi.org/10.1080/15980316.2012.673509

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