Multi-gate MOSFET circuit design

Abstract

This Chapter describes the interrelationship between the multi-gate FET device properties and elementary digital and analog circuits, such as CMOS logic gates, SRAM cells, reference circuits, operational amplifiers, and mixedsignal building blocks. This approach is motivated by the observation that a cost-efficient, heterogeneous SoC integration is a key factor in modern IC design. The basic idea behind this chapter is to describe the interrelationship between the MuGFET device properties and elementary digital and analog circuits, such as CMOS logic gates, SRAM cells, reference circuits, operational amplifiers, and mixed-signal building blocks. This approach is motivated by the observation that a cost-efficient, heterogeneous SoC integration is a key factor in modern IC design. Typical examples are GSM/EDGE baseband processors for cellular phones [1], low-power multimedia processors [2] and ultra-low-power IC's for wireless sensor networks and ambient intelligent applications.[3] From a technical point of view, common feature of these SoC applications is that they are all operated in an active and leakage power-limited environment. The prospect that MuGFET devices offer reduced leakage currents and improved low-voltage performance compared to planar bulk devices on the one hand and the challenges caused when leaving the evolutionary scaling path of planar CMOS on the other hand motivates an early circuit investigation in close cooperation with technology development. © 2008 Springer Science+Business Media, LLC.