Register Allocation via Hierarchical Graph Coloring

Abstract

We present a graph coloring register allocator designed to minimize the number of dynamic memory references. We cover the program with sets of blockscalled tiles and group these tiles into a tree reflecting the program's hierarchical control structure. Registers are allocated for each tile using standard graph coloring techniques and the local allocation and conflict information is passed around the tree in a two phase algorithm. This results in an allocation of registers that is sensitive to local usage patterns while retaining a global perspective. Spill code is placed in less frequently executed portions of the program and the choice of variables to spill is based on usage patterns between the spills and the reloads rather than usage patterns over the entire program. © 1991, ACM. All rights reserved.