In order to solve the system performance bottleneck of a 3D graphics acceleration SoC, we exploit design space exploration on performance evaluation and benchmark characteristics using SystemC We find out the bottleneck according to the simulation results of 9 hardware/software configurations and find out the tradeoffs between different configurations. The performance issues of SoC have been explored under the low-cost constraints, such as cache size effect, hardware accelerations and memory traffic. In conclusions, we provide the performance/cost tradeoffs and 3D graphics benchmark features for designing a 3D graphics SoC © IFIP International Federation for Information Processing 2007.
CITATION STYLE
Yeh, T. C., Ho, T. Y., Chen, H. Y., & Huang, I. J. (2007). SystemC-based design space exploration of a 3D graphics acceleration SoC for consumer electronics. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4808 LNCS, pp. 531–540). Springer Verlag. https://doi.org/10.1007/978-3-540-77092-3_46
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