This paper presents a simulation methodology called Behavioral Emulation (BE) for scalable design-space exploration of algorithms and architectures. By design, BE is independent of simulation vehicle (e.g., simulation in software or emulation in hardware) and addresses system-simulation complexity with a coarse-grained, multi-scale approach. We describe the BE methodology, component models, and simulation workflow from calibration to validation of applications simulated on existing architectures and present a device-level case study with roughly 10% relative error. Finally, we discuss the extension of validated models to predict application performance on notional architectures.
CITATION STYLE
Kumar, N., Pascoe, C., Hajas, C., Lam, H., Stitt, G., & George, A. (2016). Behavioral emulation for scalable design-space exploration of algorithms and architectures. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 9945 LNCS, pp. 5–17). Springer Verlag. https://doi.org/10.1007/978-3-319-46079-6_1
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