Design of a Low Power and Low Phase Noise VCO Using Active Resistor and DTMOS

Abstract

This brief represents a low power and low phase noise voltage controlled oscillator (VCO) using dynamic threshold MOSFETs (DTMOS) and active resistors. One pair of nMOS and one pair of pMOS transistors are associated in between CMOS cross-coupled pair, which serves as active resistors in series with the cross-coupled pair. DTMOSs are used instead of normal MOSFETS, in which the body is dynamically connected to the gate so that the body to source voltage will be adjusted with the change in gate voltage. This is responsible for threshold voltage reduction. With a decrease in the threshold voltage, the output voltage swing of VCO increases and the phase noise decreases accordingly. In this work in addition to conventional DTMOS, a capacitive divider circuit is used, which solves the issue of forward biasing of pn-junction at body to source of MOSFETs. The proposed VCO architecture is implemented in 180 nm CMOS technology and simulated in cadence tool. It demonstrates a tuning range of 1.78 GHz to 1.81 GHz and lower phase noise of −118 dBc/Hz at carrier offset of 1 MHz and −48 dBc/Hz at carrier offset of 1 kHz with a power consumption of 0.15 mW. So, this work will be a proper building block for the design of a customized receiver.