Neural Signal Conditioning Circuits

Abstract

The increasing density and the miniaturization of the functional blocks in these multi-electrode arrays presents significant circuit design challenge in terms of area, power, and the scalability, reliability and expandability of the recording system. In this chapter, we present a neural signal conditioning circuit for biomedical implantable devices, which includes low-noise signal amplification and band-pass filtering. The circuit is realized in a 65 nm CMOS technology, and consumes less than 1.5 μW. The fully differential low-noise amplifier achieves 40 dB closed loop gain, occupies an area of 0.04 mm2, and has input referred noise of 3.1 μVrms over the operating bandwidth 0.1–20 kHz. The capacitive-attenuation band-pass filter with first-order slopes achieves 65 dB dynamic range, 210 mVrms at 2 % THD and 140 μVrms total integrated output noise.