A systematic evaluation of compact hardware implementations for the Rijndael S-box

Abstract

This work proposes a compact implementation of the AES S-box using composite field arithmetic in GF(((22)2)2). It describes a systematic exploration of different choices for the irreducible polynomials that generate the extension fields. It also examines all possible transformation matrices that map one field representation to another. We show that the area of Satoh's S-box, which is the most compact to our knowledge, is at least 5% away from an optimal solution. We implemented this optimal solution and Satoh's design using a 0.18 μm standard cell library. © Springer-Verlag Berlin Heidelberg 2005.