Compiler-assisted thread level control speculation

Abstract

This paper proposes two compiler-assisted techniques to improve thread level control speculation in speculative multithreading executions. The first technique is to increase the overall speculation accuracy by identifying threads which have exactly one successor whose address is statically determinable. The successors of these threads are then predicted using a small full associative buffer, reducing the requirement for entry in the original path-based thread predictor. The second technique is to insert information to enable early validation of thread level control speculation and to reduce the mispeculation penalty. The combination of the two techniques achieved 5.8% performance improvement on average for SPEC95int benchmark. ©Springer-Verlag 2003.