This paper describes a design method to secure encryption algorithms against Differential Power Analysis at the logic level. The method employs logic gates with a power consumption, which is independent of the data signals, and therefore the technique removes the foundation for DPA. In a design experiment, a fundamental component of the DES algorithm has been implemented. Detailed transistor level simulations show a perfect security whenever the layout parasitics are not taken into account. © Springer-Verlag Berlin Heidelberg 2003.
CITATION STYLE
Tiri, K., & Verbauwhede, I. (2003). Securing encryption algorithms against DPA at the logic level: Next generation smart card technology. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2779, 125–136. https://doi.org/10.1007/978-3-540-45238-6_11
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