The first Arm Floating-Point Accelerator, which appeared in 1993, resembled the x87 coprocessor in its use of an 80-bit EP register file. This was succeeded by the Vector Floating-Point (VFP) architecture, which included 64-bit registers implementing the single-, double-, and half-precision data formats. The NEON Advanced SIMD extension later added 128-bit instructions for media and signal processing applications.
CITATION STYLE
Russinoff, D. M. (2019). Arm Floating-Point Instructions. In Formal Verification of Floating-Point Hardware Design (pp. 233–236). Springer International Publishing. https://doi.org/10.1007/978-3-319-95513-1_14
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