Page replacement algorithms for NAND flash memory storages

Abstract

This paper presents new page replacement algorithms for NAND flash memory, called CFLRU/C, CFLRU/E, and DL-CFLRU/E. The algorithms aim at reducing the number of erase operations and improving the wear-leveling degree of Hash memory. In the CFLRU/C and CFLRU/E algorithms, the least recently used clean page is selected as the victim within the pre-specified window of the LRU list. If there is no clean page within the window, CFLRU/C evicts the dirty page with the lowest access frequency while CFLRU/E evicts the dirty page with the lowest block erase count. DL-CFLRU/E maintains two LRU lists called the clean page list and the dirty page list, and first evicts a page from the clean page list. If there is no clean page in the clean page list, DLCFLRU/E evicts the dirty page with the lowest block erase count within the window of the dirty page list. Experiments through simulation studies show that the proposed algorithms reduce the number of erase operations and improve the wear-leveling degree of flash memory compared to LRU and CFLRU. © Springer-Verlag Berlin Heidelberg 2007.