Recent developments in scheduling and allocation of high level synthesis

Abstract

We survey the recent developments of scheduling and allocation techniques in high level synthesis. Technology driven High-Level Synthesis is a customized high-level synthesis tool to make an optimal hardware generation, it makes the present knowledgeable of the target Field Programmable Gate Array. We then describe the different techniques and applications of different scheduling and allocation concepts in high level synthesis. To maximize the benefits of HLS, this paper describes the scheduling and allocation algorithms using Technology Specific Library (TSL). © 2012 ICST Institute for Computer Science, Social Informatics and Telecommunications Engineering.