Abstract
A generic programmable time event coded circuit which forms the building block for a reconfigurable neuromorphic array is implemented in analog VLSI. An array of programmable time event coded circuit blocks is configured to implement functional circuit blocks of a spike time based neuromorphic model. A reconfigurable neuromorphic array chip with 10 event blocks is fabricated using Austria Microsystems 0.35 μm CMOS technology to demonstrate the functionality of the circuits in silicon. © Springer-Verlag Berlin Heidelberg 2007.
Cite
CITATION STYLE
Koickal, T. J., Gouveia, L. C. P., & Hamilton, A. (2007). A programmable time event coded circuit block for reconfigurable neuromorphic computing. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4507 LNCS, pp. 430–437). Springer Verlag. https://doi.org/10.1007/978-3-540-73007-1_53
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