Synchronizing a pair of receiver clock variable frequency oscillators upon alternate rises of the transmitted signal simplifies downstream circuitry. The problem to be solved consists of synchronizing a receiver clock by using only information contained in the transmitted signal. If the clock that sends the digital data (signal) is used to decode the data at the receiver, then another pair of wires (or a bus) is required to transmit the clock. Switching of the signal and clock is more difficult because of skew and because there are more switches.
CITATION STYLE
Hennet, P. P., Hoevel, L. W., & LaMaire, O. R. (1984). CLOCK SYNCHRONIZATION. IBM Technical Disclosure Bulletin, 27(7 A), 3677–3678. https://doi.org/10.1007/978-1-4939-2864-4_72
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