Power-efficient noise-induced reduction of reram cell's temporal variability effects

Abstract

Resistive Random Access Memory (ReRAM) is a promising novel memory technology for non-volatile storing, with low-power operation and ultra-high area density. However, ReRAM memories still face issues through commercialization, mainly owing to the fact that the high fabrication variations and the stochastic switching of the manufactured ReRAM devices cause high Bit Error Rate (BER). Given that ReRAM devices are nonlinear elements, the nonlinear phenomenon of Stochastic Resonance (SR), which defines that an input disturbance with specific characteristics can improve the total performance of the nonlinear system, is used to reduce the ReRAM cell's BER. Thus, in this brief, the BER of a single ReRAM cell is explored, using the Stanford PKU model, and is improved after the application of specific additive input noise. The power dissipation of the proposed approach is also evaluated and compared with the consideration of higher amplitude writing pulses in the lack of noise, showing that the proposed noise-induced technique can decrease the BER without the excessive increase of the power dissipation. As a first step, towards the experimental verification of the proposed method, noise-induced measurements on a single fabricated ReRAM device are also performed. Overall, the presented results of the BER reduction with low power dissipation, reaching up to 3.26× less power consumption considering 100 ns writing pulses, are encouraging for ReRAM designers, delivering a circuit-level solution against the device-level problem.