Designing Digital Systems Using Cartesian Genetic Programming and VHDL

Abstract

This chapter describes the use of biologically inspired Evolutionary Algorithms (EAs) to create designs for implementation on a reconfigurable logic device. Previous work on Evolvable Hardware (EHW) is discussed with a focus on timing problems for digital circuits. An EA is developed that describes the circuit using a Hardware Description Language (HDL) in a Cartesian Genetic Programming (CGP) framework. The use of an HDL enabled a commercial hardware simulator to be used to evaluate the evolved circuits. Timing models are included in the simulation allowing sequential circuits to be created and assessed. The aim of the work is to develop an EA that is able to create time dependent circuity using the versatility of a HDL and a hardware timing simulator. The variation in the circuit timing from the placement of the logic components, led to an environment with a selection pressure that promoted a more robust design. The results show the creation of both combinatorial and sequential circuits.