This paper deals with design of an application protocol classifier intended for high speed networks operating at 100 Gbps. Because a very low latency is the main design constraint, the classifier is constructed as a combinational circuit in a field programmable gate array. The classification is performed using the first packet carrying the application payload. In order to further reduce the latency, the circuit is optimized by Cartesian genetic programming. Using a real network data, we demonstrated viability of our approach in task of a very fast classification of three application protocols (HTTP, SMTP, SSH).
CITATION STYLE
Grochol, D., Sekanina, L., Zadnik, M., & Korenek, J. (2015). A fast fpga-based classification of application protocols optimized using cartesian GP. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 9028, pp. 67–78). Springer Verlag. https://doi.org/10.1007/978-3-319-16549-3_6
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