Designing a Low-Power LNA and Filter for Portable EEG Acquisition Applications

Abstract

A circuit with a low-power low-noise amplifier and a Gm-C ultra-low-power filter is proposed in this paper for portable electroencephalogram (EEG) acquisition applications. The proposed circuit contains a two-stage chopper-stabilized fully recycling folded cascode (TSRFC) amplifier and a second-order continuous-time Gm-C low pass filter (LPF) with ultra-low-power consumption. The noise and input offset are reduced using the chopper-stabilized technique. A two-stage amplifier that consists of composite transistors and a recycling structure is proposed for the amplifier. Compared to a typical folded cascode CMOS amplifier, the proposed design has higher DC gain and slew rate as well as lower input-referred noise. This circuit has an adjustable second-order Gm-C LPF with very low power consumption. The amplifier achieves a midband gain of 70 dB and a-3dB bandwidth in the range 0.1-212 Hz. Moreover, the amplifier is designed in 0.18-μ m CMOS process and the chip area of the proposed circuit with pads is 450× 450\,\,μ m2. The adjustable LPF has a 100 Hz cut-off frequency. The proposed circuit has an input-referred noise of 0.7μ Vrms, (0.1 100Hz) and a power consumption of 380 nW at 1 V supply.