Due to the combination of flexibility and realization efficiency, reconfigurable hardware has become a promising implementation alternative. In the context of the IST-AMDREL project, a mixed granularity reconfigurable SoC platform targeting wireless communication systems has been developed. The platform's main building blocks are presented, including coarse grain reconfigurable unit, embedded FPGA, interconnection network and application specific reusable blocks. The combination of these blocks in platform instances is expected to lead to a good balance between implementation efficiency and flexibility. An AMDREL platform based reconfigurable SoC for a multi-mode wireless networking system is currently under development. © Springer-Verlag 2004.
CITATION STYLE
Masselos, K., Blionas, S., Mignolet, J. Y., Foster, A., Soudris, D., & Nikolaidis, S. (2004). Hardware building blocks of a mixed granularity reconfigurable system-on-chip platform. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 3254, 613–622. https://doi.org/10.1007/978-3-540-30205-6_63
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