Transport-triggering vs. Operation-triggering

Abstract

Transport-triggered architectures are a new class of architectures that provide more scheduling freedom and have unique compiler optimizations. This paper reports experiments that quantify the advantages of transport-triggered architectures with respect to traditional operation-triggered architectures. For the experiments we use an extended basic block scheduler that is currently being developed. The paper gives an description of the scheduling techniques used. The results of our experiments show that the extra scheduling freedom together with the new optimizations are very welcome when resource constraints are limiting the performance. This is the case when resources are scarce or when the application contains a lot of instruction level parallelism.