A performance model of fault-tolerant routing algorithm in interconnect networks

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Abstract

The Software-Based fault-tolerant routing [1] has been proposed as an efficient routing algorithm to preserve both performance and fault-tolerant demands in large-scale parallel computers and current multiprocessor systems-on-chip (Mp-SoCs). A number of different analytical models for fault-free routing algorithms have been suggested in the past literature. However, there has not been reported any similar analytical model of fault-tolerant routing in the presence of faulty components. This paper presents a new analytical model to capture the effects of failures in wormhole-switched k-ary n-cubes using Software-Based fault-tolerant routing algorithm. The validity of the model is demonstrated by comparing analytical results with those obtained through simulation experiments. © Springer-Verlag Berlin Heidelberg 2006.

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APA

Safaei, F., Fathy, M., Khonsari, A., & Ould-Khaoua, M. (2006). A performance model of fault-tolerant routing algorithm in interconnect networks. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 3991 LNCS-I, pp. 744–752). Springer Verlag. https://doi.org/10.1007/11758501_99

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